1. Field
This disclosure relates generally to data processing, and more specifically, to debug signaling in a multiple processor data processing system.
2. Related Art
Some applications for integrated circuit data processing systems require a higher than average level of reliability. For example, fly-by-wire, anti-lock braking, automobile airbags, and other systems where a failure can result in injury, are examples of systems that require highly reliable operation.
There are many ways to improve reliability. For example, in a memory, reliability can be improved by adding redundant components that take over when the primary components fail. In a multi-processor system, better reliability has been achieved by running multiple processors in “lockstep”. When two or more processors are running in lockstep, each processor is executing the same instruction stream at the same time or within a predetermined skew of each other (i.e. within a predetermined number of clocks of each other). Issues arise, however, when debugging such a multiple processor system. For example, the asynchronous nature of a debug port relative to the processor clock domain of one or more processors within the multiple processor system may cause issues with remaining in lockstep, since the action of one processor may be different following synchronization of debug entry and exit commands. That is, another processor within the multiple processor system may not synchronize the debug entry and exit commands at a same clock cycle, and thus may incur a delay in seeing the debug mode entry or exit, resulting in the loss of lockstep.